With the development of printed circuit board and large scale integrated circuit technologies, printed circuit boards become more and more complicated with an increasing number of pins of elements and an increasing density of the pins, so that it becomes more and more difficult to contact a test point with a probe of a multimeter or an oscillograph, and the cost thereof is becoming increasingly higher. Some companies in the North America established the Joint Test Action Group (JTAG) and drafted the Boundary Scan Testing (BST) specification in the year of 1988, and the specification was approved as the 1149.1 standard by the Institute of Electrical and Electronic Engineers (IEEE) in the year of 1990.
The boundary scan technology exerts full control on a pin of a boundary scan device by software to set or read its status. FIG. 1 illustrates a schematic diagram of a structure of a boundary scan device 100, wherein a logic 1040 is an original logic function module inside the device 100; Input/Output (I/O) pins 1002-1007 of the device each correspond to a boundary scan unit 1010-1015; each boundary scan unit is arranged between a external pin and a internal logic function module of a chip and the units are connected in series inside the device to form a boundary scan chain. When the device operates normally, a boundary scan function is disabled, the boundary scan unit is “transparent”, and the logic function module inside the device can be operated normally through the device pins. After a dedicated Test Access Port (TAP) controller 1020 inside the device is controlled with by using a Test Clock Input (TCK) 1000 and a Test Mode Select Input (TMS) 1009 to enable the boundary scan function, status of each pin in any boundary scan unit can be read or set through the boundary scan chain, therefore it is possible to perform a test of a circuit inside or outside the device by a dedicated test software.
FIG. 2 illustrates a schematic diagram of performing a boundary scan of a plurality of test devices by a boundary scan controller 22. The boundary scan controller 22 is connected with a scan signal generation apparatus 20 via a PCI interface, a USB interface, a network interface, etc., and is adapted to convert parallel test data sent from the scan signal generation apparatus 20 into serial test data identifiable by the boundary scan controller 22 while generating a clock signal TCK and a status control signal TMS which are transferred together with TDI via an interface unit to boundary scan devices 24 to be tested. The boundary scan controller 22 receives a TDO signal from the boundary scan devices 24 to be tested via the interface unit.
The boundary scan devices 24 to be tested are connected in the form of chain through Test Data Inputs (TDI) and Test Data Outputs (TDO), that is, the TDO of a first device 100-1 is connected with the TDI of a second device 100-2; the TDO of the second device 100-2 is connected with the TDI of a third device 100-3; and so on. The test data of the boundary scan controller is input to the TDI of the first device 100-1, then serial-to-parallel conversion is performed in the first device 100-1, afterwards it passes through each boundary scan unit sequentially, finally parallel-to-serial conversion is performed and then it goes from the TDO into the TDI of the second device 100-2 for the identical processing. The Test Clock Signal (TCK) and the Test Mode Signal (TMS) of the boundary scan controller 22 are input respectively to the TCK and the TMS of each device.
The boundary scan technology is initially used for circuit connection test, generally the scale of the test is not big, and the boundary scan speed is not high but acceptable in view of a short period of time for a round of the scan test. In recent years, the application scope of the boundary scan technology has been extended gradually to the fields of online programming of nonvolatile devices and online simulation and diagnosis due to its uniqueness, which will be described briefly below.
Online programming of nonvolatile devices is implemented by making use of the feature that a boundary scan is capable of controlling the status of an I/O pin arbitrarily, the boundary scan controller performs online programming of a nonvolatile device, i.e., a FLASH, a Complex Programmable Logic Device (CPLD), etc., by controlling the status of an I/O pin of a boundary scan device. In online programming of the nonvolatile device, the boundary scan device is interconnected with the Flash device, and complete simulation of Flash programming timing under the control of boundary scan signals output from the boundary scan controller is able to write desired data into the Flash device and thereby finish the programming, and to retrieve the data for a check. In this way, it is not necessary for any function inside the device to participate, and the device can be programmed with high reliability as long as it is in proper connection. However a low speed of programming may result from a large number of I/O pins of the boundary scan device due to serial input and output of the test data.
In analogy to the above online programming procedure, online simulation and diagnosis make use of the feature of a boundary scan to set or read statuses of a set of signals in a system to thereby simulate and diagnose a specific function.
The boundary scan controller in the conventional techniques drives a Transistor-Transistor Logic (TTL) level signal or a Complementary Metal-Oxide-Semiconductor Transistor (CMOS) signal. However, it is required to connect a boundary scan signal to a plurality of devices for a boundary scan of the devices, thereby requiring a long wiring line with numerous branches; the TTL signal and the CMOS signal are single-end signals and only one signal line is required in the transmission circuit; external interferences may be superimposed directly over the single-end signal line and the single-end transmission signal line may also eradiate more interferences outward; and the single-end signal is more easily subject to interference in the case of a long transmission distance. Furthermore, a common ground plane is used as a signal returning channel for single-end transmission, and various interferences over the ground plane may have direct influences on signal transmission. Consequently using the TTL signal or the CMOS signal as a boundary scan signal may cause a considerable crosstalk among signals, a poor anti-interference capability and a slow speed of the boundary scan.